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System design for telecommunication gateways
发布日期:2011-09-08  浏览

【内容简介】
System Design for Telecommunication Gateways provides a thorough review of designing telecommunication network equipment based on the latest hardware designs and software methods available on the market. Focusing on high-end efficient designs that challenge all aspects of the system architecture, this book helps readers to understand a broader view of the system design, analyze all its most critical components, and select the parts that best fit a particular application. In many cases new technology trends, potential future developments, system flexibility and capability extensions are outlined in preparation for the longevity typical for products in the industry.
Key features:
Combines software and hardware aspects of the system design. Defines components and services supported by open-source and commercial basic and extended software platforms, including operating systems, middleware, security, routing, management layer and more. Focuses on disruptive technologies. Provides guidelines for developing software architectures based on multi-threaded, multi-process, multi-instance, multi-core, multi-chip, multi-blade and multi-chassis designs. Covers a number of advanced high-speed interconnect and fabric interface technologies and their commercial implementations. Presents different system form factors from compact pizza-box styles to medium and large bladed systems, including IBM BladeCenter, ATCA and microTCA-based chassis. Describes different mezzanine cards, such as PMC, PrPMC, XMC, AMC and others.
【目次】
1 Introduction 1
2 System View 3
2.1 System Architecting 3
2.2 Platform-Based Approach 6
2.3 System Verification 14
3 Hardware Technologies and Platforms 17
3.1 Different Form Factors 17
3.1.1 Proprietary 1U/2U/4U Chassis 18
3.1.2 Standard-Based Systems 35
3.1.3 IBM Blade Center 80
3.1.4 Comparison of Form Factors 83
3.2 Stacking Chassis 84
3.3 Cluster Computing 86
3.4 Inter-Blade Interconnect 88
3.4.1 Switch Fabric Technologies 89
3.4.2 Bandwidth Estimation and QoS in the Switch Fabric 94
3.4.3 Commercial Switch Fabric 97
3.5 Hardware Solutions for Data, Control and Management Planes Processing 105
3.5.1 General Purpose CPUs 108
3.5.2 FPGAs and ASICs 110
3.5.3 Network Processors 134
3.5.4 Classification Processors and Co-Processors 158
3.5.5 Content Processors 160
3.5.6 Multicore Processors 189
3.5.7 Graphic Processors 275
3.5.8 Massively Parallel Processor Array Chips 286
3.5.9 Traffic Management 287
3.5.10 Data Plane and Control Plane Scalability 297
3.5.11 Redundancy for Carrier Grade Solutions 298
4 Software Technologies and Platforms 303
4.1 Basic Software Platform 303
4.1.1 Operating Systems 303
4.1.2 Networking Stacks 309
4.2 Expanded Software Platform 317
4.2.1 Middleware 318
4.2.2 Management Plane 402
4.2.3 Deep Packet Inspection and Other Software 412
4.3 Single-Threaded and Multi-X Software Designs 417
4.3.1 Industry Opinions about Different Design Types 418
4.3.2 Single-Threaded Design 419
4.3.3 Multi-Threaded Design 423
4.3.4 Multi-Process Design 425
4.3.5 Multi-Instance Design 428
4.3.6 Co-Location and Separation of Platform and Application 432
4.3.7 Multicore Design 434
4.3.8 Fine-Grained Task-Oriented Programming Model 436
4.3.9 Multicore Performance Tuning 443
4.4 Partitioning OS and Virtualization 449
4.4.1 Commercial and Open Source Embedded Hypervisor Offerings 459
4.4.2 Hypervisor Benchmarking 463
References 465
Trademarks 467
Index 469

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