Virtual platforms are finding widespread use in both pre- and post-silicon computer software and system development. They reduce time to market, improve system quality, make development more efficient, and enable truly concurrent hardware/software design and bring-up. Virtual platforms increase productivity with unparalleled inspection, configuration, and injection capabilities. In combination with other types of simulators, they provide full-system simulations where computer systems can be tested together with the environment in which they operate. This book is not only about what simulation is and why it is important, it will also cover the methods of building and using simulators for computer-based systems. Inside you'll find a comprehensive book about simulation best practice and design patterns, using Simics as its base along with real-life examples to get the most out of your Simics implementation. You'll learn about: Simics architecture, model-driven development, virtual platform modelling, networking, contiguous integration, debugging, reverse execution, simulator integration, workflow optimization, tool automation, and much more.* Distills decades of experience in using and building virtual platforms to help readers realize the full potential of virtual platform simulation* Covers modeling related use-cases including devices, systems, extensions, and fault injection* Explains how simulations can influence software development, debugging, system configuration, networking, and more* Discusses how to build complete full-system simulation systems from a mix of simulators
Foreword xiii
Acknowledgments xv
Chapter 1 Introduction 1 (20)
Virtual Platforms 2 (2)
Terminology 3 (1)
Simulation and the System Development 4 (12)
Lifecycle
Hardware Development and Design 5 (1)
Pre-Silicon 5 (1)
Platform Development 6 (1)
Application Development 7 (1)
Debugging 8 (1)
Testing and Integration 9 (2)
Deployment 11 (1)
Maintenance 11 (1)
Training 12 (2)
Longevity Support 14 (1)
Certifiable and Safety-Critical Systems 15 (1)
Model-Driven Development 16 (2)
Processor-in-the-Loop Testing 16 (1)
Hardware-in-the-Loop Testing 17 (1)
Integration Testing 17 (1)
Book Outline 18 (1)
Trademark Information 19 (2)
Chapter 2 Simics Fundamentals 21 (40)
Simics Architecture and Terminology 21 (2)
Running Real Software Stacks 23 (1)
Interacting with Simics 23 (5)
Software Debugging 26 (1)
Scripting 26 (2)
Configurations and the Simics Object Model 28 (3)
Attributes 28 (1)
Interfaces 29 (1)
Haps 29 (1)
Ports 30 (1)
Documentation and Metadata 30 (1)
Call Chain and Locality 30 (1)
Changing the Configuration 30 (1)
Components 31 (1)
Time in Simics 32 (1)
Abstraction Levels 33 (2)
Event-Based Simulation 35 (4)
Multiprocessor Scheduling 37 (1)
Cycle-Accurate Simulation 38 (1)
Memory Maps 39 (3)
Hierarchical Memory Maps 40 (1)
RAM, ROM, and Flash 40 (1)
PCI and Other Memory-Mapped Interfaces 41 (1)
Multiprocessor Memory Maps 42 (1)
Memory Images 42 (2)
Checkpointing 44 (2)
Portability and Implementation Independence 45 (1)
Differential Checkpoints 46 (1)
Session State and Simulation State 46 (1)
Determinism and Repeatability 46 (3)
Reverse Execution 47 (1)
Recorders 48 (1)
Simics Performance Technology 49 (9)
Simulation Speed Measures 49 (1)
Multiprocessor Simulation Speed Measurement 50 (1)
Speed Variability 51 (1)
Temporal Decoupling 52 (4)
Performance Effects of Changing Target 56 (2)
Timing
Models and Extensions 58 (3)
Chapter 3 Develop and Debug Software on Simics 61 (50)
Development Means Testing 61 (2)
Agent-Based Debugger 63 (1)
Debugging Using Simics 64 (17)
System-Level Debugger 65 (1)
OS Awareness 65 (3)
Simics Breakpoints 68 (1)
Reverse Debugging 69 (1)
Navigating in Time 70 (2)
Debugging Hard-to-Talk-to Targets 72 (1)
Multicore Debugging 72 (4)
Low-Level Debug 76 (3)
UEFI BIOS Debugging 79 (1)
User-Level Debugging 79 (2)
Performance Analysis 81 (2)
Profiling Instruction Counts 81 (1)
Cache and Memory 81 (1)
Impact of Hardware Accelerators 82 (1)
Inspecting the Hardware State 83 (3)
Counting Hardware Events 83 (1)
Device Registers 83 (1)
Memory Mappings 84 (1)
System Panel 85 (1)
Fault-Injection and Boundary Conditions 86 (5)
Configuration Changes 86 (2)
Changing the Software State 88 (1)
Hardware Fault Injection 88 (3)
Test Result Check 91 (1)
Using Checkpoints 91 (9)
Save the Boot Time 91 (1)
Save Work and Continue Later 91 (1)
Positioning for Analysis 92 (1)
Share Setups 92 (1)
Nightly Boot 92 (1)
Adding Actions 93 (1)
Annotations 94 (2)
Bug Transportation 96 (1)
Cloning Setups 97 (1)
Record-Replay Debugging 97 (1)
Differential Checkpoint Saving 98 (1)
Gear Shift 99 (1)
Loading Software 100 (3)
Continuous Integration 103 (2)
Software Test Automation on Simics 104 (1)
Shortcuts in the Software Stack 105 (6)
Incomplete Software 106 (1)
Simulator-Aware Software 106 (2)
Backdoor Outputs 108 (3)
Chapter 4 System Configuration in Simics 111 (18)
Simics Component System 113 (4)
Preconfiguration Objects 113 (2)
Component Connectors 115 (1)
System Metadata 115 (2)
Setup Scripts 117 (8)
Hardware Setup Scripts 119 (1)
Software Setup Scripts 119 (2)
Script Parameters 121 (1)
Script Branches 121 (2)
System Panel 123 (2)
Automating Target Configuration and Boot 125 (4)
Chapter 5 Networking 129 (32)
Network Simulation in Simics 129 (11)
Network Interfaces 129 (2)
Packet-Based Physical-Level Transport 131 (1)
Ethernet Modeling 131 (2)
Other Networks 133 (1)
Network Timing and Configuration Cells 134 (3)
Latency Management 137 (1)
Scheduling and Multithreading 138 (1)
Network Timing and Bandwidth Simulation 139 (1)
Simulated Network Nodes 140 (4)
Service Node 141 (1)
Sensors and Actuators 141 (1)
Traffic Generators 142 (1)
Network Testers 143 (1)
Rest-of-Network Simulation 143 (1)
Traffic Inspection and Modification 144 (1)
Traffic Modification 144 (1)
Ethernet Inspection with Wireshark 145 (1)
Scaling Up the Network Size 145 (5)
Infinite Inventory 146 (1)
Hypersimulation 146 (1)
Multithreading Simics 147 (1)
Distribution 147 (2)
Memory Page Sharing 149 (1)
Stubbing Network Nodes 149 (1)
Connecting the Real World 150 (4)
Dedicated Real-Network Modules 151 (1)
Availability of Hardware Ports 152 (1)
Timing Issues 152 (1)
Real-Time Mode 153 (1)
Ethernet Real-Network Variants 154 (4)
Network Address Translation and Port 154 (1)
Forwarding
Ethernet Bridging 155 (1)
Host Access 156 (2)
Programming New Networks 158 (3)
Chapter 6 Building Virtual Platforms 161 (50)
The Purpose of the Model 161 (4)
What to Model 162 (2)
How to Model 164 (1)
The Modeler 165 (1)
Virtual Platforms in Simics 165 (7)
Following the Hardware Structure 170 (2)
Device Modeling Language 172 (2)
Overview of DML 172 (1)
DML Compilation Process 172 (1)
Reactive Modeling Style 173 (1)
Model Performance 174 (1)
Reusing Existing Information 174 (1)
Register Maps 174 (1)
Device Functionality 175 (1)
DML Features 175 (13)
Inline Documentation 176 (2)
Register Maps 178 (2)
Templates 180 (1)
Bit Field Decoding 181 (2)
Endianness and Partial Accesses 183 (1)
C-like Core Language 184 (1)
Memory Layouts 184 (1)
Interfaces to Other Models 185 (1)
Simics Attributes 185 (3)
Functionality Templates 188 (1)
Creating Device Models 188 (3)
Setting Up the Environment 188 (1)
Test Methodology 188 (2)
Adding a Model to the Simulation 190 (1)
Completing the Device Model 191 (6)
Reserved Registers and Missed Accesses 197 (3)
Reserved Registers 199 (1)
Creating Models in other Languages 200 (11)
Module Scanning 201 (1)
Module Loading 201 (1)
Class Registration 202 (2)
Objects 204 (1)
Attributes 204 (2)
Interfaces 206 (3)
Logging 209 (1)
Events 209 (2)
Chapter 7 DMA: A Concrete Modeling Example 211 (26)
DMA Device Description 211 (3)
Functional Description 212 (2)
Implementing the Basic DMA Device Model 214 (13)
Unit Testing 214 (1)
Simulating Time 215 (7)
Scatter-Gather List Support 222 (4)
Avoiding Deadlock 226 (1)
Creating a PCI Express (PCIe) Model 227 (1)
Creating a Component for the DMA Model 227 (6)
Creating a Device Driver 233 (4)
Driver Overview 234 (1)
Bring It All Together 234 (3)
Chapter 8 Simulator Extensions 237 (20)
Introduction 237 (3)
Applications of Extensions 237 (2)
Script or Extension 239 (1)
Device or Extension 239 (1)
Implementing Extensions 240 (4)
C or Python 240 (1)
Attribute Values 241 (1)
Callback Functions 241 (1)
Getting to a Safe Context 242 (1)
Special Concerns When Creating Extensions 243 (1)
On-the-Fly Python Objects 244 (1)
Cache and Memory Simulation 244 (5)
Simics' Generic Cache Model 246 (3)
Fault Injection 249 (8)
Modifying Memory and Registers 250 (1)
Error Reporting Registers in Devices 250 (1)
Intercepting Traffic 250 (2)
Intercepting Memory Accesses 252 (5)
Chapter 9 Simulator Integration 257 (26)
Introduction 257 (6)
Physics and the Environment 257 (1)
Computer Architecture 258 (3)
Hardware Validation 261 (1)
Reusing Existing Models 261 (2)
Problems and Solutions 263 (1)
Run Control 263 (1)
Launching and Embedding 264 (1)
Embedding Simics 265 (1)
Time Management 265 (4)
Synchronization Intervals 266 (1)
Simics Temporal Decoupling 267 (1)
Simics and SystemC Time 267 (2)
Communications 269 (7)
Dedicated Communications Modules 269 (1)
Devices for I/O 270 (1)
Bypassing Devices 271 (1)
Push or Pull 272 (1)
Abstraction Level Change and Transactors 273 (1)
State Transfer in Checkpoints 274 (2)
Frontends 276 (1)
Running Simics from Other Programs 277 (1)
Virtual Lab Management 277 (1)
Record-Replay Debugging of Target Software 278 (2)
Running on a Simics Target 280 (1)
Multiple Simulator APIs 281 (1)
Simics Processor API 281 (2)
Chapter 10 Intelｮ Architecture Bring-Up 283 (26)
Pre-Silicon Process 283 (10)
Early Collaboration with Hardware Architects 284 (1)
New Instruction Set Support and Usage 285 (1)
Collecting Requirements from Customers 286 (2)
BIOS Development and Enabling Capabilities 288 (1)
Using Simics
Software and Simulator Cross-Validation 288 (1)
UEFI BIOS Debug 289 (1)
JEDEC Memory Module Support 290 (1)
Fault Injection and RAS 290 (1)
Machine Check Errors 291 (1)
Device-Specific Faults 292 (1)
Early OS Enabling 293 (2)
Compatibility Hardware Level for Legacy 294 (1)
Drivers
BIOS SATA Mode Switching 294 (1)
Common OS Installation Steps 295 (1)
Post-Silicon Process 295 (5)
Post-Silicon Modeling 296 (4)
Post-Silicon Case Study: PXE 300 (9)
PXE Overview 300 (2)
Server-Side Software Support 302 (1)
Service Node as Server 302 (1)
Virtual Platform as Server 303 (1)
Client-Side Software Support 303 (1)
Integrated BIOS Approach 303 (1)
NIC OpROM Approach 304 (2)
PXE Final Results 306 (3)
Appendix A: Source Code 309 (26)
References 335 (6)
Index 341
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