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Envelope Tracking Power Amplifiers for Wireless Communications
发布日期:2015-12-03  浏览

Envelope Tracking Power Amplifiers for Wireless Communications

[BOOK DESCRIPTION]

Envelope tracking technology is seen as the most promising efficiency enhancement technology for RF PA for 4G and beyond wireless communications. More and more organizations are investing and researching on this topic with huge potential academic and commercial values. This is the first book on the market to give complete introduction, theory, and design considerations on envelope tracking for wireless communications. This resource presents microwave design engineers with a full introduction to the subject and covers underlying theory and practical design considerations.


[TABLE OF CONTENTS]


Preface                                            ix
Acknowledgments                                    xv
    Chapter 1 High-Efficiency Power Amplifier      1  (50)
    Architectures and Devices
      1.1 Efficiency Definitions for RF PA         2  (1)
      1.2 Characteristics of Modern Modulated      3  (4)
      Signals
        1.2.1 Crest Factor                         4  (1)
        1.2.2 Probability Density Function         4  (1)
        1.2.3 Second Generation Signal             5  (1)
        1.2.4 Third Generation Signal              6  (1)
        1.2.5 Fourth Generation Signal             7  (1)
      1.3 Architectures for High-Efficiency PA     7  (30)
        1.3.1 Switch Mode PA                       9  (13)
        1.3.2 Waveform-Engineered PA               22 (4)
        1.3.3 Doherty                              26 (6)
        1.3.4 LINC and Outphasing                  32 (2)
        1.3.5 Envelope Elimination and             34 (1)
        Restoration
        1.3.6 Envelope Tracking                    35 (2)
      1.4 Device Technologies for                  37 (14)
      High-Efficiency PA
        1.4.1 GaAs HBT                             38 (1)
        1.4.2 CMOS                                 39 (3)
        1.4.3 Si-LDMOS                             42 (1)
        1.4.4 GaN HEMT                             43 (3)
        References                                 46 (5)
    Chapter 2 Envelope Tracking Power Amplifier    51 (40)
    Basics
      2.1 Introduction                             51 (3)
        2.1.1 Motivation for ET                    51 (2)
        2.1.2 ET Pyramid                           53 (1)
      2.2 Principle of ET                          54 (3)
        2.2.1 Signal Definition                    55 (1)
        2.2.2 ET Efficiency                        56 (1)
        2.2.3 Design Considerations                56 (1)
      2.3 Instantaneous Efficiency of PA           57 (8)
        2.3.1 Class-B Deduction                    58 (3)
        2.3.2 ET Deduction                         61 (2)
        2.3.3 Efficiency Degradation Factor        63 (2)
      2.4 Statistical Average Efficiency of ET     65 (7)
        2.4.1 Statistical Average Efficiency       66 (1)
        Definition
        2.4.2 Efficiency and Gain Trajectory       67 (5)
        for ET
      2.5 Bandwidth of ET                          72 (3)
        2.5.1 Bandwidth of Envelope                72 (2)
        2.5.2 Video Bandwidth of ET                74 (1)
      2.6 Linearity of ET                          75 (6)
        2.6.1 Two-Tone IMD                         76 (1)
        2.6.2 Modulated Signal Linearity           76 (5)
      2.7 Power Capacity for ET Scenarios          81 (4)
        2.7.1 ET for BTS                           82 (1)
        2.7.2 ET for Mobile                        83 (1)
        2.7.3 VSWR Immunity in ET                  84 (1)
      2.8 Frequency Agility                        85 (6)
        2.8.1 MMMB PA with ET                      85 (2)
        2.8.2 ET PA Integration                    87 (1)
        References                                 87 (4)
    Chapter 3 Envelope Generation and Alignment    91 (26)
      3.1 Envelope Generation                      92 (8)
        3.1.1 Analog Generation                    92 (3)
        3.1.2 Digital Generation                   95 (3)
        3.1.3 MIPI eTrak Interface                 98 (2)
      3.2 Envelope Detector Specifications         100(11)
        3.2.1 Dynamic Range                        101(1)
        3.2.2 Modulation Bandwidth                 101(2)
        3.2.3 Slew Rate                            103(2)
        3.2.4 Conversion Gain                      105(1)
        3.2.5 Gain Ripple                          106(1)
        3.2.6 Temperature Variance                 106(1)
        3.2.7 Transfer Function                    107(2)
        3.2.8 Total Harmonic Distortion            109(1)
        3.2.9 Response Delay                       110(1)
      3.3 Timing Alignment                         111(2)
        3.3.1 Analog Alignment                     112(1)
      3.4 Offset Adjustment                        113(4)
        3.4.1 Principle of Operation               113(1)
        3.4.2 Adaptive Adjustment                  114(1)
        References                                 115(2)
    Chapter 4 Supply Modulator for Envelope        117(74)
    Tracking
      4.1 Introduction                             117(6)
        4.1.1 Supply Modulator Requirements        119(2)
        4.1.2 Mathematical Model for Efficiency    121(2)
      4.2 Linear Supply Modulator                  123(17)
        4.2.1 Linear Voltage Regulator             124(1)
        4.2.2 Class-AB/B                           125(5)
        4.2.3 Class-G/H                            130(7)
        4.2.4 Power DAC                            137(3)
      4.3 Discrete Supply Modulator                140(18)
        4.3.1 Isolated SMPS                        141(1)
        4.3.2 Nonisolated SMPS                     141(6)
        4.3.3 Summary of SMPS for ET               147(1)
        4.3.4 Multilevel Supply Modulator          147(2)
        4.3.5 Multiphase Supply Modulator          149(7)
        4.3.6 Output Filter for Discrete           156(2)
        Modulator
      4.4 Hybrid Supply Modulator                  158(33)
        4.4.1 Serial Hybrid                        158(3)
        4.4.2 Parallel Hybrid Hybrid               161(8)
        4.4.3 AET Hybrid                           169(2)
        4.4.4 CCG Hybrid                           171(3)
        4.4.5 Power DAC Hybrid                     174(1)
        4.4.6 Parallel Hybrid with Multiswitcher   175(3)
        4.4.7 Combined Hybrid                      178(3)
        4.4.8 Nested and Multinested               181(4)
        References                                 185(6)
    Chapter 5 Power Amplifier for Envelope         191(38)
    Tracking
      5.1 RF PA Design Methodology                 192(3)
        5.1.1 Measurement Method                   192(1)
        5.1.2 Analytical Method                    193(1)
        5.1.3 EDA and Modeling Method              193(2)
      5.2 Matching Network Design                  195(12)
        5.2.1 Introduction                         195(1)
        5.2.2 Matching Theory                      196(5)
        5.2.3 Multisection and Taper Matching      201(4)
        5.2.4 Nonsynchronous Impedance             205(2)
        Transformer
      5.3 Bias Network Design                      207(3)
        5.3.1 Classical Bias Network               207(2)
        5.3.2 ET Feeding Line Bias Network         209(1)
      5.4 Waveform-Engineered Matching             210(4)
        5.4.1 Engineered Waveforms                 211(1)
        5.4.2 Harmonic Load-Pull                   212(1)
        5.4.3 Physical Implementation              213(1)
      5.5 Class-P PA Design for ET                 214(9)
        5.5.1 Waveform Engineered Class-P          215(2)
        5.5.2 Physical Implementation              217(5)
        5.5.3 Design for ET                        222(1)
      5.6 Driver Design for ET Lineup              223(6)
        5.6.1 PAE Lineup                           224(1)
        5.6.2 Lineup Implementation                225(1)
        References                                 226(3)
    Chapter 6 Digital Front End Design for         229(54)
    Envelope Tracking
      6.1 Digital Front End                        229(1)
      6.2 Crest Factor Reduction                   230(13)
        6.2.1 Threshold and Metrics                234(1)
        6.2.2 Peak-Windowing CFR                   235(2)
        6.2.3 Noise-Shaping CFR                    237(2)
        6.2.4 Peak-Cancellation CFR                239(1)
        6.2.5 Constrained Clipping CFR             240(3)
      6.3 Envelope Shaping Function                243(14)
        6.3.1 Introduction                         243(1)
        6.3.2 De-Trough for Efficiency             244(4)
        6.3.3 De-Trough for Linearity              248(2)
        6.3.4 Sweet-Spot Tracking                  250(1)
        6.3.5 Advanced Envelope Shaping            251(1)
        6.3.6 Bandwidth Reduction Shaping          252(2)
        6.3.7 Slew Rate Reduction Shaping          254(3)
      6.4 Timing Alignment                         257(4)
        6.4.1 Timing Mismatch                      258(1)
        6.4.2 Timing Alignment                     258(3)
      6.5 Digital Predistortion                    261(13)
        6.5.1 Introduction                         262(2)
        6.5.2 DPD Forward Path                     264(1)
        6.5.3 Complex LUT DPD                      264(3)
        6.5.4 Memory Polynomial DPD                267(1)
        6.5.5 Combined DPD                         268(2)
        6.5.6 DPD Feedback Path                    270(1)
        6.5.7 Indirect Learning DPD                271(2)
        6.5.8 Direct Learning DPD                  273(1)
      6.6 Image and Carrier Suppression            274(9)
        6.6.1 Quadrature Modulation Errors         274(1)
        6.6.2 Quadrature Modulation Correction     274(3)
        6.6.3 Adaptive QMC                         277(1)
        References                                 278(5)
    Chapter 7 Experimental Methodologies and       283(48)
    Measurements for Envelope Tracking
      7.1 Motivation and Introduction              283(9)
        7.1.1 ET Test Considerations               284(1)
        7.1.2 Modulated Signal Measurement         284(2)
        7.1.3 Measurement Process                  286(6)
      7.2 Envelope Measurement                     292(5)
        7.2.1 Sinusoidal Signal Measurement        293(1)
        7.2.2 Multitone Signal Measurement         294(1)
        7.2.3 True Envelope Measurement            295(2)
      7.3 Supply Modulator Measurements            297(6)
        7.3.1 Measurement Setup                    297(3)
        7.3.2 Error Measurements                   300(2)
        7.3.3 Design Considerations for            302(1)
        Measurement
      7.4 RF PA Measurements                       303(13)
        7.4.1 Nonlinear Vector Network Analysis    305(1)
        7.4.2 Swept Load-Pull                      306(3)
        7.4.3 Measurement for Memory Effects       309(1)
        7.4.4 Measurements for ET Trajectory       310(6)
      7.5 ET PA Measurements                       316(15)
        7.5.1 Test Bed Synchronization             316(1)
        7.5.2 CW Versus Complex Stimulus           317(2)
        Measurements
        7.5.3 Complex Measurements Setup           319(3)
        7.5.4 Complex Characterization             322(1)
        Techniques
        7.5.5 Power Measurements                   323(1)
        7.5.6 Efficiency Measurements              324(3)
        References                                 327(4)
About the Author                                   331(2)
Index                                              333

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