Electrostatic discharge (ESD) continues to impact semiconductor manufacturing, semiconductor components and systems, as technologies scale from micro- to nano electronics. This book introduces the fundamentals of ESD, electrical overstress (EOS), electromagnetic interference (EMI), electromagnetic compatibility (EMC), and latchup, as well as provides a coherent overview of the semiconductor manufacturing environment and the final system assembly. It provides an illuminating look into the integration of ESD protection networks followed by examples in specific technologies, circuits, and chips. The text is unique in covering semiconductor chip manufacturing issues, ESD semiconductor chip design, and system problems confronted today as well as the future of ESD phenomena and nano-technology. Look inside for extensive coverage on: * The fundamentals of electrostatics, triboelectric charging, and how they relate to present day manufacturing environments of micro-electronics to nano-technology * Semiconductor manufacturing handling and auditing processing to avoid ESD failures * ESD, EOS, EMI, EMC, and latchup semiconductor component and system level testing to demonstrate product resilience from human body model (HBM), transmission line pulse (TLP), charged device model (CDM), human metal model (HMM), cable discharge events (CDE), to system level IEC 61000-4-2 tests * ESD on-chip design and process manufacturing practices and solutions to improve ESD semiconductor chip solutions, also practical off-chip ESD protection and system level solutions to provide more robust systems * System level concerns in servers, laptops, disk drives, cell phones, digital cameras, hand held devices, automobiles, and space applications * Examples of ESD design for state-of-the-art technologies, including CMOS, BiCMOS, SOI, bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, smart power, magnetic recording technology, micro-machines (MEMs) to nano-structures ESD Basics: From Semiconductor Manufacturing to Product Use complements the author's series of books on ESD protection. For those new to the field, it is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic Era.
About the Author xiii
Preface xv
Acknowledgments xvii
1 Fundamentals of Electrostatics 1 (20)
1.1 Introduction 1 (1)
1.2 Electrostatics 1 (6)
1.2.1 Thales of Miletus and 2 (1)
Electrostatic Attraction
1.2.2 Electrostatics and the 3 (1)
Triboelectric Series
1.2.3 Triboelectric Series and Gilbert 4 (1)
1.2.4 Triboelectric Series and Gray 4 (1)
1.2.5 Triboelectric Series and Dufay 4 (1)
1.2.6 Triboelectric Series and Franklin 5 (1)
1.2.7 Electrostatics - Symmer and the 5 (1)
Human Body Model
1.2.8 Electrostatics - Coulomb and 5 (1)
Cavendish
1.2.9 Electrostatics - Faraday and the 5 (1)
Ice Pail Experiment
1.2.10 Electrostatics - Faraday and 6 (1)
Maxwell
1.2.11 Electrostatics - Paschen 6 (1)
1.2.12 Electrostatics - Stoney and the 6 (1)
"Electron"
1.3 Triboelectric Charging - How does it 7 (1)
Happen?
1.4 Conductors, Semiconductors, and 8 (1)
Insulators
1.5 Static Dissipative Materials 8 (1)
1.6 ESD and Materials 9 (1)
1.7 Electrification and Coulomb's Law 9 (2)
1.7.1 Electrification by Friction 10 (1)
1.7.2 Electrification by Induction 10 (1)
1.7.3 Electrification by Conduction 10 (1)
1.8 Electromagnetism and Electrodynamics 11 (1)
1.9 Electrical Breakdown 11 (4)
1.9.1 Electrostatic Discharge and 11 (1)
Breakdown
1.9.2 Breakdown and Paschen's Law 12 (1)
1.9.3 Breakdown and Townsend 12 (1)
1.9.4 Breakdown and Toepler's Law 13 (1)
1.9.5 Avalanche Breakdown 13 (2)
1.10 Electroquasistatics and 15 (1)
Magnetoquasistatics
1.11 Electrodynamics and Maxwell's 16 (1)
Equations
1.12 Electrostatic Discharge (ESD) 16 (1)
1.13 Electromagnetic Compatibility (EMC) 16 (1)
1.14 Electromagnetic Interference (EMI) 16 (1)
1.15 Summary and Closing Comments 17 (4)
References 17 (4)
2 Fundamentals of Manufacturing and 21 (18)
Electrostatics
2.1 Materials, Tooling, Human Factors, 22 (1)
and Electrostatic Discharge
2.1.1 Materials and Human Induced 23 (1)
Electric Fields
2.2 Manufacturing Environment and Tooling 23 (1)
2.3 Manufacturing Equipment and ESD 23 (1)
Manufacturing Problems
2.4 Manufacturing Materials 24 (1)
2.5 Measurement and Test Equipment 24 (3)
2.5.1 Manufacturing Testing for 25 (2)
Compliance
2.6 Grounding and Bonding Systems 27 (1)
2.7 Worksurfaces 27 (1)
2.8 Wrist Straps 28 (1)
2.9 Constant Monitors 28 (1)
2.10 Footwear 28 (1)
2.11 Floors 28 (1)
2.12 Personnel Grounding with Garments 29 (1)
2.12.1 Garments 29 (1)
2.13 Air Ionization 29 (1)
2.14 Seating 29 (1)
2.15 Carts 30 (1)
2.16 Packaging and Shipping 31 (1)
2.16.1 Shipping Tubes 31 (1)
2.16.2 Trays 32 (1)
2.17 ESD Identification 32 (1)
2.18 ESD Program Management - Twelve 32 (1)
Steps to Building an ESD Strategy
2.19 ESD Program Auditing 33 (1)
2.20 ESD On-Chip Protection 33 (1)
2.21 Summary and Closing Comments 34 (5)
References 34 (5)
3 ESD, EOS, EMI, EMC and Latchup 39 (26)
3.1 ESD, EOS, EMI, EMC and Latchup 39 (2)
3.1.1 ESD 39 (1)
3.1.2 EOS 40 (1)
3.1.3 EMI 40 (1)
3.1.4 EMC 41 (1)
3.1.5 Latchup 41 (1)
3.2 ESD Models 41 (9)
3.2.1 Human Body Model (HBM) 41 (2)
3.2.2 Machine Model (MM) 43 (2)
3.2.3 Cassette Model 45 (1)
3.2.4 Charged Device Model (CDM) 46 (1)
3.2.5 Transmission Line Pulse (TLP) 46 (4)
3.2.6 Very Fast Transmission Line Pulse 50 (1)
(VF-TLP)
3.3 Electrical Overstress (EOS) 50 (7)
3.3.1 EOS Sources - Lightning 51 (1)
3.3.2 EOS Sources - Electromagnetic 52 (1)
Pulse (EMP)
3.3.3 EOS Sources - Machinery 52 (1)
3.3.4 EOS Sources - Power Distribution 52 (1)
3.3.5 EOS Sources - Switches, Relays 53 (1)
and Coils
3.3.6 EOS Design Flow and Product 53 (1)
Definition
3.3.7 EOS Sources - Design Issues 54 (1)
3.3.8 EOS Failure Mechanisms 55 (2)
3.4 EMI 57 (1)
3.5 EMC 57 (1)
3.6 Latchup 58 (1)
3.7 Summary and Closing Comments 59 (6)
References 59 (6)
4 System Level ESD 65 (32)
4.1 System Level Testing 65 (2)
4.1.1 System Level Testing Objectives 66 (1)
4.1.2 Distinction of System and 66 (1)
Component Level Testing Failure Criteria
4.2 When Systems and Chips Interact 67 (1)
4.3 ESD and System Level Failures 68 (2)
4.3.1 ESD Current and System Level 68 (1)
Failures
4.3.2 ESD Induced E- and H-Fields and 69 (1)
System Level Failures
4.4 Electronic Systems 70 (1)
4.4.1 Cards and Boards 70 (1)
4.4.2 System Chassis and Shielding 71 (1)
4.5 System Level Problems Today 71 (6)
4.5.1 Hand Held Systems 71 (1)
4.5.2 Cell Phones 71 (1)
4.5.3 Servers and Cables 72 (2)
4.5.4 Laptops and Cables 74 (1)
4.5.5 Disk Drives 74 (1)
4.5.6 Digital Cameras 75 (2)
4.6 Automobiles, ESD, EOS, and EMI 77 (3)
4.6.1 Automobiles and ESD - Ignition 77 (1)
Systems
4.6.2 Automobiles and EMI - Electronic 77 (1)
Pedal Assemblies
4.6.3 Automobiles and Gas Tank Fires 78 (1)
4.6.4 Hybrids and Electric Cars 78 (1)
4.6.5 Automobiles in the Future 79 (1)
4.7 Aerospace Applications 80 (3)
4.7.1 Airplanes, Partial Discharge, and 80 (1)
Lightning
4.7.2 Satellites, Spacecraft Charging, 81 (1)
and Single Event Upset (SEU)
4.7.3 Space Landing Missions 81 (2)
4.8 ESD and System Level Test Models 83 (1)
4.9 IEC 61000-4-2 83 (1)
4.10 Human Metal Model (HMM) 83 (3)
4.11 Charged Board Model (CBM) 86 (1)
4.12 Cable Discharge Event (CDE) 87 (6)
4.12.1 Cable Discharge Event (CDE) and 89 (1)
Scaling
4.12.2 Cable Discharge Event (CDE) - 89 (3)
Cable Measurement Equipment
4.12.3 Cable Configuration - Test 92 (1)
Configuration
4.12.4 Cable Configuration - Floating 92 (1)
Cable
4.12.5 Cable Configuration - Held Cable 92 (1)
4.12.6 Cable Discharge Event (CDE) - 92 (1)
Peak Current vs. Charged Voltage
4.12.7 Cable Discharge Event (CDE) - 92 (1)
Plateau Current vs Charged Voltage
4.13 Summary and Closing Comments 93 (4)
References 93 (4)
5 Component Level Issues - Problems and 97 (32)
Solutions
5.1 ESD Chip Protection - The Problem and 97 (1)
the Cure
5.2 ESD Chip Level Design Solutions - 98 (7)
Basics of Design Synthesis
5.2.1 ESD Circuits 101 (1)
5.2.2 ESD Signal Pin Protection Networks 101 (2)
5.2.3 ESD Power Clamp Protection 103 (1)
Networks
5.2.4 ESD Power Domain-to-Domain 103 (1)
Circuitry
5.2.5 ESD Internal Signal Line 104 (1)
Domain-to-Domain Protection Circuitry
5.3 ESD Chip Floor Planning - Basics of 105 (4)
Design Layout and Synthesis
5.3.1 Placement of ESD Signal Pin HBM 106 (1)
Circuitry
5.3.2 Placement of ESD Signal Pin CDM 107 (1)
Circuitry
5.3.3 Placement of ESD Power Clamp 107 (2)
Circuitry
5.3.4 Placement of ESD Vss-to-Vss 109 (1)
Circuitry
5.4 ESD Analog Circuit Design 109 (6)
5.4.1 Symmetry and Common Centroid 110 (1)
Design for ESD Analog Circuits
5.4.2 Analog Signal Pin to Power Rail 111 (1)
ESD Network
5.4.3 Common Centroid Analog Signal Pin 111 (1)
to Power Rail ESD Network
5.4.4 Co-synthesis of Common Centroid 112 (1)
Analog Circuit and ESD Networks
5.4.5 Signal Pin-to-Signal Pin 113 (1)
Differential Pair ESD Network
5.4.6 Common Centroid Signal Pin 113 (2)
Differential Pair ESD Protection
5.5 ESD Radio Frequency (RF) Design 115 (12)
5.5.1 ESD Radio Frequency (RF) Design 115 (6)
Practices
5.5.2 ESD RF Circuits - Signal Pin ESD 121 (2)
Networks
5.5.3 ESD RF Circuits - ESD Power Clamps 123 (3)
5.5.4 ESD RF Circuits - ESD RF 126 (1)
VSS-to-VSS Networks
5.6 Summary and Closing Comments 127 (2)
References 127 (2)
6 ESD in Systems - Problems and Solutions 129 (38)
6.1 ESD System Solutions from Largest to 129 (1)
Smallest
6.2 Aerospace Solutions 129 (1)
6.3 Oil Tanker Solutions 130 (1)
6.4 Automobile Solutions 130 (1)
6.5 Computers - Servers 131 (1)
6.5.1 Servers - Touch Pads and Handling 131 (1)
Procedures
6.6 Mother Boards and Cards 131 (2)
6.6.1 System Card Insertion Contacts 131 (1)
6.6.2 System Level Board Design - 131 (2)
Ground Design
6.7 System Level "On Board" ESD Protection 133 (7)
6.7.1 Spark Gaps 134 (2)
6.7.2 Field Emission Devices (FED) 136 (4)
6.8 System Level Transient Solutions 140 (4)
6.8.1 Transient Voltage Suppression 141 (2)
(TVS) Devices
6.8.2 Polymer Voltage Suppression (PVS) 143 (1)
Devices
6.9 Package-Level Mechanical ESD 144 (1)
Solutions - Mechanical "Crowbars"
6.10 Disk Drive ESD Solutions 145 (2)
6.10.1 In Line "ESD Shunt" 145 (1)
6.10.2 Armature - Mechanical "Shunt" - 145 (2)
A Built-In Electrical "Crowbar"
6.11 Semiconductor Chip Level Solutions - 147 (2)
Floor Planning, Layout, and Architecture
6.11.1 Mixed Signal Analog and Digital 147 (1)
Floor Planning
6.11.2 Bipolar-CMOS-DMOS (BCD) Floor 148 (1)
Planning
6.11.3 System-on Chip Design Floor 148 (1)
Planning
6.12 Semiconductor Chip Solutions - 149 (3)
Electrical Power Grid Design
6.12.1 HMM and IEC Specification Power 150 (1)
Grid and Interconnect Design
Considerations
6.12.2 ESD Power Clamp Design Synthesis 151 (1)
- IEC 61000-4-2 Responsive ESD Power
Clamps
6.13 ESD and EMC - When Chips Bring Down 152 (1)
Systems
6.14 System Level and Component Level ESD 152 (8)
Testing and System Level Response
6.14.1 Time Domain Reflection (TDR) and 152 (2)
Impedance Methodology for ESD Testing
6.14.2 Time Domain Reflectometry (TDR) 154 (4)
ESD Test System Evaluation
6.14.3 ESD Degradation System Level 158 (2)
Method - Eye Tests
6.15 EMC and ESD Scanning 160 (3)
6.16 Summary and Closing Comments 163 (4)
References 164 (3)
7 Electrostatic Discharge (ESD) in the 167 (28)
Future
7.1 What is in the Future for ESD? 167 (1)
7.2 Factories and Manufacturing 167 (1)
7.3 Photo-Masks and Reticles 168 (6)
7.3.1 ESD Concerns in Photo-Masks 169 (1)
7.3.2 Avalanche Breakdown in Photo-Masks 170 (1)
7.3.3 Electrical Model in Photo-Masks 171 (1)
7.3.4 Failure Defects in Photo-Masks 172 (2)
7.4 Magnetic Recording Technology 174 (2)
7.5 Micro-Electromechanical (MEM) Devices 176 (2)
7.5.1 ESD Concerns in 177 (1)
Micro-Electromechanical (MEM) Devices
7.6 Micro-Motors 178 (2)
7.6.1 ESD Concerns in Micro-Motors 178 (2)
7.7 Micro-Electromechanical (MEM) RF 180 (2)
Switches
7.7.1 ESD Concerns in 180 (2)
Micro-Electromechanical (MEM) RF
Switches
7.8 Micro-Electromechanical (MEM) Mirrors 182 (1)
7.8.1 ESD Concerns in 182 (1)
Micro-Electromechanical (MEM) Mirrors
7.9 Transistors 183 (4)
7.9.1 Transistors - Bulk vs. SOI 184 (1)
Technology
7.9.2 Transistors and FinFETs 185 (1)
7.9.3 ESD in FinFETs 185 (2)
7.10 Silicon Nanowires 187 (1)
7.11 Carbon Nanotubes 187 (1)
7.12 Future Systems and System Designs 188 (1)
7.13 Summary and Closing Comments 189 (6)
References 190 (5)
Glossary 195 (4)
ESD Standards 199 (4)
Index 203
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